Tensilica Announces ISP IP, Software Alliances

Tensilica announces IVP, an imaging and video dataplane processor (DPU) for image/video signal processing in mobile handsets, tablets, DTV, automotive, video games and computer vision based applications. "Consumers want advanced imaging functions like HDR, but the shot-to-shot time with the current technology is several seconds, which is way too long. Users want it to work 50x faster. We can give consumers the instant-on, high-quality image and video capture they want," stated Chris Rowen, Tensilica’s founder and CTO.

The IVP is extremely power efficient. As an example, for IVP implemented in an automatic synthesis, P&R flow in 28nm HPM process, regular VT, a 32-bit integral image computation on 16b pixel data at 1080p30 consumes 10.8 mW. The integral image function is commonly used in applications such as face and object detection and gesture recognition.

Tensilica also announced a number of alliances with software vendors Dreamchip, Almalence, Irida Labs, and Morpho.

The IVP Core Architecture
With Sample Memory Sizes Selected

EETimes talks about a battle between Tensilica and Ceva imaging IP cores. No clear winnder is declared, but Tensilica IVP is said to have more processing power. Another EETimes article talks about ISP IP applications and requirements.