Weekly Patent Review

Siliconfile puts quite a detailed description of its CIS process tricks in US20080224187 application. One can see that Siliconfile engineers have quite a deep process knowledge. The proposed economical method of photodiode formation does not have whole the flexibility of more complex techniques, but it definitely gives the company an advantage in mask count.

TSMC application US20080224247 talks about BSI sensor backside passivation scheme. TSMC proposes to form an additional shallow p-n junction on the backside, which effectively isolates the backside surface traps from the main photodiode.

Micron application US20080225144 proposes to use image sensor array as a memory in addition to its sensor. Each photodiode can serve as a multilevel storage node. The idea is very old and I doubt the new patent would be granted on it.

Kodak application US20080225148 exploits an old idea of saving select transistor in 4T pixel. But what is interesting there is the proposed pixel layout. If Kodak pixel really looks as on Fig. 5, it should have huge crosstalk due to capacitive coupling between neighboring floating diffusions (one needs to stack two Fig. 5 pictures horizontally so see this). Pixel designers, don't do that!