MarketWire: Sidense announces that Aptina is using Sidense's field-programmable 1T-OTP memory macros for several image sensor and camera module products for the mobile, consumer, automotive and surveillance markets. The 1T-OTP IP is developed for TSMC's 65nm LP process node. The 1T-OTP macros support calibration and optimization of image sensors in a chip, module or system environment.
"Aptina chose Sidense OTP for storing calibration and lens correction information in our image sensor and companion chip products for its small macro area, reliable field programmability to support correction in finished modules, and scalability to new process nodes for future product development," said Sion Quinlan, Aptina's Director of Circuit IP. "Because Sidense's OTP does not add any additional processing steps or masks to our sensor process, Aptina benefits with a cost and time savings."
"Aptina chose Sidense OTP for storing calibration and lens correction information in our image sensor and companion chip products for its small macro area, reliable field programmability to support correction in finished modules, and scalability to new process nodes for future product development," said Sion Quinlan, Aptina's Director of Circuit IP. "Because Sidense's OTP does not add any additional processing steps or masks to our sensor process, Aptina benefits with a cost and time savings."
Aptina Licenses OTP IP in 65nm TSMC Process
![Aptina Licenses OTP IP in 65nm TSMC Process]()
Reviewed by MCH
on
February 21, 2012
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