CEVA announced the availability of its first imaging and vision platform based on its CEVA-MM3000 architecture framework. CEVA-MM3101 is a programmable, low power platform targeting image and video processing in camera-enabled devices, including smartphones, tablets and smart TVs.
The CEVA-MM3101 platform integrates image and video pipeline, image enhancement, embedded vision applications and image encoding functions. Instead of using fixed-function engines or running these functions on the main application processor, the CEVA-MM3101 is specifically architected to support all of these functions on a single processor, resulting in a 20X reduction in power consumption when compared to CPU-based solutions.
The CEVA-MM3101 is capable of processing video streams of 1080p, or 8MP images at 12 fps, with video stabilization, color correction, wide dynamic range (WDR), face detection and gesture recognition.
CEVA has collaborated with eyeSight to deliver a comprehensive offering for Human Machine Interface (HMI), based on the CEVA-MM3101 platform. eyeSight's offering includes hand gesture recognition and virtual mouse user interface technology using finger tracking for multiple users in various conditions. CEVA and eyeSight will demonstrate a range of real-world applications for this technology at CES 2012.
At the heart of the CEVA-MM3101 is a programmable Vector Processing (VP) engine. The Vector Processor performs filtering and the vector-type operations required for pixel processing. It is based on a dedicated pixel-processing VLIW/SIMD architecture with 10-stage pipeline. It contains 7 different units that can work in parallel enabling flexible combination for different type of instructions. All instructions are conditional execution using predication optimized to save code size. The VP can handle 32 byte operations in one cycle and contains special instructions that can be configured in order to create proprietary filters for video and imaging processing. This strong processor is optimized for multimedia operations, capable of 64 SAD calculations in one cycle as well as producing 8 results for 6 Tap filters – which make it ideal for image signal processing algorithms.
The CEVA-MM3101 platform integrates image and video pipeline, image enhancement, embedded vision applications and image encoding functions. Instead of using fixed-function engines or running these functions on the main application processor, the CEVA-MM3101 is specifically architected to support all of these functions on a single processor, resulting in a 20X reduction in power consumption when compared to CPU-based solutions.
The CEVA-MM3101 is capable of processing video streams of 1080p, or 8MP images at 12 fps, with video stabilization, color correction, wide dynamic range (WDR), face detection and gesture recognition.
CEVA has collaborated with eyeSight to deliver a comprehensive offering for Human Machine Interface (HMI), based on the CEVA-MM3101 platform. eyeSight's offering includes hand gesture recognition and virtual mouse user interface technology using finger tracking for multiple users in various conditions. CEVA and eyeSight will demonstrate a range of real-world applications for this technology at CES 2012.
At the heart of the CEVA-MM3101 is a programmable Vector Processing (VP) engine. The Vector Processor performs filtering and the vector-type operations required for pixel processing. It is based on a dedicated pixel-processing VLIW/SIMD architecture with 10-stage pipeline. It contains 7 different units that can work in parallel enabling flexible combination for different type of instructions. All instructions are conditional execution using predication optimized to save code size. The VP can handle 32 byte operations in one cycle and contains special instructions that can be configured in order to create proprietary filters for video and imaging processing. This strong processor is optimized for multimedia operations, capable of 64 SAD calculations in one cycle as well as producing 8 results for 6 Tap filters – which make it ideal for image signal processing algorithms.
CEVA Announces ISP IP
Reviewed by MCH
on
January 04, 2012
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Reviewed by MCH
on
January 04, 2012
Rating:
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